### CS 231 - Micro Electronics

#### Handout on Circuits and Logic Handout on Truth Tables

##### Objectives:

This lesson discusses more Boolean logic. Objectives important to this lesson:

1. More logic gates
2. More truth tables
##### Handout

There are more logic gates that the ones we discussed last time. We discussed the OR gate, which I explained is also called the inclusive OR, because it is satisfied if either or both of its inputs are on.

The inclusive OR gate takes two inputs, A and B, and produces one output, Q.  The rule for the inclusive OR gate is that the output is true if either one or both of the inputs are true.

 A B Q 0 0 0 0 1 1 1 0 1 1 1 1 In the image above from Wikipedia, the two inputs are labeled A and B, and the output is labeled Q,

The other kind of OR gate is the exclusive OR, also called the XOR gate. The XOR gate produces a True output if one and only one of its two inputs are True.

 A B Q 0 0 0 0 1 1 1 0 1 1 1 0 In the image above from Wikipedia, the two inputs are labeled A and B, and the output is labeled out. Note the curved line on the left (input) side of the logic gate, marking it as an exclusive gate.

This has an application that relates to binary math. When we add two binary digits, we have an output of 1 when one and only one of the digits being added is 1. In addition, we must also consider whether we carried in a 1 from the previous column, which would make it a problem of adding three digits. When we add 1 and 1 in binary, we get 10, so we write the 0 and carry the 1 to the next column. This rule matches the behavior of the XOR gate, except that we need to account for the carried over 1. We can do that by feeding the input from our digits to another gate as well: an AND gate. When both inputs are 1s, an AND gate produces a 1 as its output. This will serve as the 1 that is carried,

Remember that an AND gate has two inputs and it only produces a 1 for its output when both inputs are 1s.

 A B Q 0 0 0 0 1 0 1 0 0 1 1 1 So our adder module must have two (actually, three) kinds of gates, and must accept three inputs, producing two outputs. An image on Wikipedia shows a possible configuration. The inputs are A, B, and Cin. The outputs are S and Cout. There are two XOR gates, two AND gates, and an OR gate as well. • In this circuit, when either A or B are on alone, and there is nothing to carry in, there is nothing to carry out, and the sum is just 1.
• When A and B are both on at the same time, and there is nothing to carry in, there is a 1 to carry out, and the sum for the column is 0.
• When A or B are on alone, but there is a 1 to carry in, the result is the same as the condition above: there is a 1 to carry out, and the sum for the column is 0.
• When A and B are on at the same time, and there is a 1 to carry in, there is a 1 to carry out, and the sum is also 1.
• When neither A nor B are on, but there is a 1 to carry in, there is nothing to carry out, and the sum is 1.

Use the Logic Lab site to build a working model of the Wikipedia adder structure. The lines will necessarily cross each other, but their functions are clear when you toggle the values for A, B, and Cin. Show it to me in class for credit.

We should do a few more truth tables. Let's take a look at the handout for CT100, which has several truth table fragments on it. There are several good problems in it. I will assign five of them.

 Assignment 2: CT 100 Handout Download and save the CT100 handout. Answer problems 1, 2, 3, 6, and 10 in the handout For each problem show the correct number of lines, show a column for each intermediate result, and show a column for the final result. Make sure your answers are correct by building and testing a model in the Neuroproductions Logic Lab site. Turn in your truth tables and a screen shot of your model work for each assigned problem